Field of Invention
The present invention relates to a metal oxide semiconductor (MOS) device having recess and a manufacturing method thereof; particularly, it relates to such a MOS device having a reduced electric field to suppress the hot carrier effect, whereby the substrate current generated due to the hot carrier effect is suppressed without affecting the threshold voltage and the ON-resistance, and a manufacturing method of the MOS device.
Description of Related Art
Please refer to FIGS. 1A-1E, which show, by cross-section views, manufacturing process steps of a prior art N-type MOS device. As shown in FIGS. 1A-1E, first, isolation structures 12al and 12ar are formed in a substrate 11 to define a device region 100; and a P-type well 12b, a gate 13, a lightly doped diffusion (LDD) 14, a source 15a and a drain 15b are formed in the device region 100. The P-type well 12b can be the substrate 11 itself if the substrate 11 is P-type. The gate 13 includes a dielectric layer 13a, an electrode layer 13b and a spacer layer 13c. The LDD 14, the drain 15b and the source 15a are formed by a lithography process and an ion implantation process, wherein the lithography process defines the implantation regions, and the ion implantation process implants N-type impurities to the defined regions.
This prior art N-type MOS device has a drawback: because the concentration of the N-type impurities of the source 15a and the drain 15b is higher than the concentration of the N-type impurities of the two LDDs 14, and because the source 15a and the drain 15b are in contact with the two LDDs 14 respectively in the lateral direction, certain N-type impurities in the source 15a will diffuse to the LDD 14 connected to the source 15a. As a result, when an electric field is applied, a hot carrier effect will occur to lower the threshold voltage (Vt) of this prior art N-type MOS device, such that the device cannot operate as designed.
In view of the above, to overcome the drawback in the prior art, the present invention proposes a MOS device having recess and a manufacturing method thereof, which are capable of reducing the electric field to suppress hot carrier effect, whereby the substrate current generated due to the hot carrier effect is suppressed without affecting the threshold voltage and the ON-resistance of the MOS device.